1. Field of the Invention
The present invention relates to a semiconductor device including a chip assembly formed by stacking a plurality of chips, a method of fabricating the same and a semiconductor device fabricating apparatus.
2. Background Art
A conventional semiconductor device having a high integration level has a plurality of chips of different types stacked on a single die pad for high integration. A method of fabricating such a conventional semiconductor device will be briefly described with reference to FIG. 3 illustrating a process for fabricating the semiconductor device.
Shown in FIG. 3 are a second wafer 1a divided into second chips 3a by dicing, a first wafer 1b divided into first chips 3b by dicing, a first collet 5a for holding and carrying the first chip 3b from the first wafer 1b to a die pad 12 mounted on a stage, a second collet 5b for holding and carrying the second chip 3a from the second wafer 1a to the die pad 12, a second bonding layer 7a for bonding the second chip 3a to the first chip 3b, a first bonding layer 7b for bonding the first chip 3b to the die pad 12, a semiconductor device 15 fabricated by stacking up the chips 3a and 3b, and die bonders 20a and 20b included in a semiconductor device fabricating apparatus.
Referring to FIG. 3, the first wafer 1b is mounted on a wafer holder, not shown, included in the first die bonder 20a. A wafer cassette, not shown, holding a plurality of first wafers 1b therein is carried to the first die bonder 20a. The first wafer 1b is conveyed from the wafer cassette to the wafer holder by a wafer conveying device. The first wafer 1b is divided into a plurality of first chips 3b by dicing.
One of the first chips 3b is picked up from the first wafer 1b by the first collet 5a. The first collet 5a carries the first chip 3b having a back surface coated with the first bonding layer 7b to a position above a stage holding a leadframe provided with a die pad 12.
The stage is heated, the first collet 5a is lowered in the direction of the arrow to press the first chip 3b provided with the bonding layer 7b against the die pad 12 to bond the first chip 3b to the die pad 12. Then, the die pad 12 is carried away from the first die bonder 20a. 
The die pad 12 supporting the first chip 3b thereon is carried to a stage, not shown, included in the second die bonder 20b. The second wafer 1a is mounted on a wafer holder, not shown, included in the second die bonder 20b. A wafer cassette, not shown, holding a plurality of second wafers 1a therein is carried to the second die bonder 20b. The second wafer 1a is conveyed from the wafer cassette to the wafer holder by a wafer conveying device. The second chips 3a of the second wafer 1a are of a kind different from that of the first chips 3b of the first 1b; that is, the first chip 3b of the first wafer 1b and the second chip 3a of the second wafer 1a are provided with different elements and circuits, respectively, and have different sizes, respectively.
The second collet 5b picks up one of the second chips 3a of the second wafer 1a having a back surface coated with a bonding layer 7a and carries the same to the stage supporting leadframe provided with the die pad 12.
The stage is heated, the second collet 5b is lowered in the direction of the arrow, and the second chip 3a is pressed against the first chip 3b mounted on the die pad 12 to bond the second chip 3a to the first chip 3b. Thus, the two chips 3a and 3b are stacked on the die pad 12.
The number of the die bonders necessary for carrying out this conventional semiconductor device fabricating method is equal to that of the chips to be stacked on the die pad. A bonding process for bonding the lower chip to the die pad is carried out by a first die bonder, and a bonding process for bonding the upper chip to the lower chip bonded to the die pad is carried out by a second die bonder. Thus, each bonding process needs one die bonder.
If a single die bonder is used for carrying out the plurality of bonding processes, the arrangements of the die bonder must be changed for each bonding process, which reduces the operating ratio of the die bonder. When a plurality of die bonders are assigned to a plurality of bonding processes, respectively, each die bonder operates at a high operating ratio. However, the transfer of one die pad from one to another die bonder needs a comparatively long process time, which is an impediment to the improvement of the efficiency of the semiconductor device fabricating apparatus for the mass production of semiconductor devices. When a plurality of die bonders are used, a large-scale semiconductor device fabricating apparatus is necessary and such a semiconductor device fabricating apparatus needs a large equipment investment.